Reports, briefs and technical notes from Cools on semiconductor packaging technology and industry.
Technical notePhotonicsIn heterogeneous silicon photonics integration, each added material exposes heat-sensitive optical devices to the bonding temperature again. This Technical Note sets out the principle, process and equipment of interface-selective bonding, which converts light into heat only at the designed bond interface. The full report is available in Korean. An English summary is provided on this page.
Technical noteGlass substratesThis Technical Note describes how a functionalized silsesquioxane (SQ) coating can serve as the interface for forming copper in glass vias, RDL layers and on ABF substrates, and which process module changes in each application. The full report is available in Korean. An English summary is provided on this page.
Technical noteSolarSemi-transparent solar cells divide a single absorber between daylighting and power generation. This Technical Note describes a manufacturing approach in which the thickness of a single-crystal III–V layer, set by the exfoliation depth, fixes both transmittance and output as product specifications. The full report is available in Korean. An English summary is provided on this page.
Technical notePlatingThis Technical Note examines the burden that sputtered seed layers place on large-area RDL built on panels, as in CoPoS. It describes a wet metallization approach that changes only the seed-forming module, using a PDA interface layer and electroless copper.
Technical notePower semiconductorsEven after AI racks move to high-voltage DC distribution, a low-voltage, high-current conversion stage remains just ahead of the GPU. This Technical Note looks at moving that stage closer to the load as a cooling-structure problem. The full report is available in Korean. An English summary is provided on this page.
Technical noteThermal controlThis Technical Note addresses the warpage and component tilt that arise when copper posts and MLCCs mounted together on a wafer are reflowed in one laser step. It describes a process that uses a light-transmitting upper head to support the parts and remove heat.
Technical notePlatingThis Technical Note describes how to remove the adhesive-opening step from bottom-up plating of through-glass vias that use a copper foil as the via-bottom electrode. It covers PDA bonding, a pressed electrode, a sealing jig and the plating bath layout.
Technical noteBonding materialsThis Technical Note sets out a process design for making Cu/PDA particles for copper sintering pastes used in power semiconductor die attach, running from acid pickling to seed growth in one wet process. It also describes how each step is to be verified. The full report is available in Korean. An English summary is provided on this page.
Technical noteThermal controlThis Technical Note examines how warpage left after molding disturbs solder ball mounting and board-level joints in fine-pitch FCCSP. It describes a process that restores flatness outside the mold through reheating, pressing and constrained cooling.