About this document
This Technical Note examines filling the via cores of glass core substrates by copper paste filling and sintering instead of electrolytic copper growth. It describes a design that uses PDA separately on copper particles and on the via wall, and the resulting manufacturing process.
Download
An English edition is not available yet. The Korean document is below.
Summary
Filling deep vias by electroplating requires a seed and electrode as well as control of solution delivery and current distribution. PDA on the particle surface suppresses oxidation while still allowing Cu–Cu connection during sintering, and PDA on the via wall handles glass-to-copper adhesion. The note covers a paste filling and sintering process built on these two separately designed interfaces, and the literature behind it.
Conclusion
Vias in glass core substrates are normally filled by growing electrolytic copper from a seed and electrode, and in deep vias delivering solution and managing current distribution become the hard parts. The document proposes moving metal formation in the via core from plating growth to filling and sintering. It does not propose dropping plating for surface RDL and pads. The key is to give the two interfaces different jobs. A thin PDA layer on the particle surface suppresses oxidation during storage, mixing and filling, then rearranges or partially clears during sintering so that necks can grow between particles and form a continuous copper body with fewer oxide barriers. PDA on the via wall aids wetting and initial fixing during filling and is designed to keep the sidewall bond after sintering shrinkage. The document notes that PDA alone does not guarantee an oxide-free result and that the interface state and adhesion after heat treatment must be checked separately. The cited study (Kim et al., 2011; 30-minute sintering in Ar, planar CPW) reports neck growth between particles above 350 °C and roughly 5 dB lower loss at 20 GHz. The same paper names a geometry mismatch, with a designed 120 μm line printing out at about 200 μm, and residual oxidation even in Ar as loss factors. The document treats 10% porosity as a review assumption rather than an acceptance limit, and argues that at high frequency the position and connectivity of pores and the connection at the pad transition matter more than pore volume. The skin depth of room-temperature bulk copper is 2.09 μm at 1 GHz and 0.38 μm at 30 GHz (calculated). The proposed process applies via-wall PDA treatment, filling with paste made from PDA-treated powder, drying and atmosphere sintering, and planarization and surface wiring to glass that has already been drilled, chemically strengthened and cleaned. Temperature and time are set for each material combination, and the sintering thermal budget is designed together with the remaining strengthened state. Package-grade glass core substrates come first; interposers are to be considered once fine pitch and edge precision are secured.
Topics
- Glass substrates
- Printed electronics


